Hardware–Software Co-Design of a Low-Power Embedded SoC for Real-Time Intelligent Applications

Abstract

Devices at the network edge, including smart sensing, autonomous control and cyber -physical systems, have accelerated the need to implement real time intelligent applications which require a high level of computational performance coupled with ultra-low power usage and deterministic latency, capable of operating with embedded System-on-Chips (SoC) platforms. Traditional software-based optimization methods are becoming less and less capable of supporting the demands placed on them by intelligent workload applications, and specialized hardware-accelerated methods tend to be lacking in systematic flexibility and scalability. In order to overcome these difficulties, this paper introduces a unified hardware-software co-design architecture of a low-power integrated circuits of embedded SoC with real-time intelligent applications. The suggested methodology collective optimizes the system design, hardware-software division of labor, and software execution at runtime such that energy consumption and predictable performance are associated. It creates a modular architecture of SoC, combining a lightweight processor core with application-specific hardware accelerators and an optimized on-chip memory hierarchy, as well as the fine-grained power management mechanisms. A workload-based dynamic scheduling of the workload, use of accelerator and power is accomplished by a real-time software stack and runtime management layer. The proposed design is tested with the help of representative real-time smart workloads such as signal processing and lightweight inference tasks. Experimental measurements show high gains in energy efficiency and execution latency over software-only implementations only in the case of a baseline implementation (up to 4050% energy saving with respect to software-only implementation) and real-time constraint. The findings confirm the suitability of the given hardware-software co-design framework and emphasize its applicability to next-generation low-power embedded intelligent systems that have to work under severe conditions of energy and time constraint.