AI-Driven Design Space Exploration for Power-Efficient VLSI Architectures Using Reinforcement Learning

Abstract

As complexity of modern VLSI architectures has continued to rise, coupled with exponentially growing design parameter, traditional design space exploration (DSE) methods have proven inefficient to explore design spaces to generate optimal power-performance trade-offs. Specifically, energy efficiency has become one of the priority design goals of the third generation edge computing, AI accelerators, and low-power embedded systems. The paper is a reinforcement learning (RL)-based design space exploration framework targeting at maximizing the energy efficiency within the VLSI architectures. This problem formulation codes the DSE problem as a time-dependent decision-making framework in which an RL agent actively seeks architectural parameters of supply voltage, operating frequency and micro-architectural structures on hardware constraints. There is a multi-objective reward formulation provided to emphasise on energy efficiency and punish unduly large area and performance degradation. The structure allows the exploration to be adaptive and smart and greatly limits the use of either heuristic or intensive search method. Experimental analysis of representative general VLSI benchmarks shows the optimization proposed RL-based method can achieve up to 32–45% energy efficiency improvement over traditional heuristic and evolutionary methods of optimization and still remain a competitive benchmark, with respect to performance and area overhead. Moreover, the RL agent has higher convergence and has better scalability in varying design cases. The findings indicate that AI-based optimization is useful in facilitating automated, energy-conscious VLSI design, which can result in next-generation intelligent electronic design automation (EDA) tools.