H. T. RAI, G. W. MU, R. Q. LU. Machine Learning-Assisted Routing Optimization for Scalable Network-on-Chip Architectures. National Journal of Advanced VLSI Design and Systems, [S. l.], v. 1, n. 1, p. 91–98, 2026. Disponível em: https://iaeces.com/Index/index.php/NJAVDS/article/view/191. Acesso em: 30 jul. 2026.