Holistic PPA-Optimized VLSI Architectures for Sustainable and Ultra-Low-Power Electronic Systems
Keywords:
Energy-Efficient VLSI, PPA Optimization, Ultra-Low-Power Architectures, Cross-Layer Co-Design, Sustainable Electronics, Memory and Data-Movement EnergyAbstract
The swift increase of data-intensive and ever-on electronic systems has further focused the
advisability of energy-efficient and sustainable VLSI designs that streamline the usage of power,
performance as well as silicon region optimality in unison. The long-time traditional low-power
design methodologies, which usually concentrate on power or performance or area alone,
and at a single level of abstraction, are increasingly no longer sufficient in the deeply scaled
technologies in which data movement energy, leakage currents and thermal constraints is
driving system behaviour. This review gives a global view of PPA-optimised VLSI architectures,
synthesising design methods at all circuit, microarchitecture, memory, architecture and
system levels to make possible ultra-low-power and sustainable electronic systems. Important
circuit-level techniques including voltage scaling, power gating and Adaptive computing are
discussed as well as micro architectural reductions in switching activity and energy-delay
efficiency. The review identifies bottlenecks in memory and data-movement as key sources
of energy and emerging conceptions of near-memory computing and in-memory computing
that help to greatly enhance energy efficiency. Heterogeneous and reconfigurable platforms,
hardware-software co-design, and AI-based runtime optimization plans are studied at the
architecture and system level based on a single PPA optimization perspective. Sustainability
goals, such as lifecycle analysis of energy, reliability conscious design and carbon conscious
metrics are combined with application oriented case studies that cover edge-AI, IoT, wearable
and cyber-physical systems. Lastly, future research and current challenges on post CMOS
technologies, 3D integration, and self-aware energy-conscious design flows are discussed.
This review offers a condensed set of framework on a unified review and practical design
input as a means to enhance the next generation of energy efficient and environmentally
friendly VLSI systems.
