Adaptive Voltage–Frequency Scaling Based VLSI Architecture Using Reinforcement Learning for Energy-Efficient High-Performance Computing Systems
Keywords:
Adaptive Voltage-Frequency Scaling (AVFS), Reinforcement Learning, Energy Consumption, VLSI Architecture, High-Performance Computing, Energy-Delay Product (EDP)Abstract
The high-speed development of high-performance computing (HPC) systems has become a serious problem in terms of energy use and has become a critical issue in contemporary VLSI design. Power management has also been necessary to achieve efficient performance of the system and minimize consumption of energy. The present paper introduces an adaptive voltage frequency scaling (DVFS) enabled VLSI architecture which integrates intelligent decision-making in optimizing energy efficiency. The suggested model employs a learning based control system by dynamically changing the voltage and frequency voltage based on the different work load conditions. The introduced system in contrast to the traditional DVFS methods, which are based on the static method or heuristics one, constantly optimizes the performance to the system conditions to achieve better energy management. Evaluation of the architecture is done by comparing simulation-based experiments in various workload conditions. The outcomes indicate that the total energy use decreases significantly and the performance level does not decline significantly. Moreover, the energy-delay characteristics are also enhanced, which demonstrates the efficiency of adaptive approach. The suggested approach offers a higher efficiency of power usage and notoriety in comparison to conventional strategies. In general, this paper offers a scalable and effective solution to energy-conscious VLSI system design that is very suitable in next-generation HPC applications that need dynamic and intelligent power management schemes.
