P. SATHISH KUMAR. Thermal-Reliable VLSI Architectures for Power-Constrained Applications. Annals of Energy-Efficient VLSI Architectures, [S. l.], v. 1, n. 1, p. 20–27, 2026. Disponível em: https://iaeces.com/Index/index.php/AEEVA/article/view/34. Acesso em: 18 apr. 2026.